Harry Foster Formal Quotations

Engineers now have the ability to formally specify properties of their hardware design model using an industry standard, and then verify these properties in dynamic verification (that is, simulation) or static verification (that is, formal verification), ... Prior to IEEE 1850, there were multiple proprietary ways of specifying properties and assertions, but not a standard. This meant that the same specification could not be used across multiple tools. With a new standard, a single form of specification can be reused across multiple processes.

Property Specification Language (PSL) gives designers an elegant way to work with the intricate software inherent in very large scale integration that goes well beyond the limits of natural design languages based on words. It also increases confidence that chip and system designs are correct before fabrication. The PSL version in IEEE 1850 is unique in that it supports formal specification and verification of design intent across all major hardware description languages.